Runtime Task Scheduling Using Imitation Learning for Heterogeneous Many-Core Systems Krishnakumar, A; Arda, S E; Goksoy, A A; Mandal, S K; Ogras, U Y; Sartor, A L; Marculescu, R IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 39 (11), pp. 4064-4077, 2020. Links BibTeX@article{9211494,
title = {Runtime Task Scheduling Using Imitation Learning for Heterogeneous Many-Core Systems},
author = {A. {Krishnakumar} and S. E. {Arda} and A. A. {Goksoy} and S. K. {Mandal} and U. Y. {Ogras} and A. L. {Sartor} and R. {Marculescu}},
url = {https://ieeexplore.ieee.org/document/9211494},
doi = {10.1109/TCAD.2020.3012861},
year = {2020},
date = {2020-10-02},
journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
volume = {39},
number = {11},
pages = {4064-4077},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
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DS3: A system-level domain-specific system-on-chip simulation framework Arda, Samet; Anish, NK; Goksoy, Ahmet Alper; Mack, Joshua; Kumbhare, Nirmal; Sartor, Anderson Luiz; Akoglu, Ali; Marculescu, Radu; Ogras, Umit Y IEEE Transactions on Computers, 2020. Links BibTeX@article{arda2020ds3,
title = {DS3: A system-level domain-specific system-on-chip simulation framework},
author = {Samet Arda and NK Anish and Ahmet Alper Goksoy and Joshua Mack and Nirmal Kumbhare and Anderson Luiz Sartor and Ali Akoglu and Radu Marculescu and Umit Y Ogras},
url = {https://arxiv.org/abs/2003.09016},
year = {2020},
date = {2020-01-01},
journal = {IEEE Transactions on Computers},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
HiLITE: Hierarchical and Lightweight Imitation Learning for Power Management of Embedded SoCs Sartor, Anderson L; Krishnakumar, Anish; Arda, Samet E; Ogras, Umit Y; Marculescu, Radu IEEE Computer Architecture Letters, 19 (1), pp. 63–67, 2020. Links BibTeX@article{sartor2020hilite,
title = {HiLITE: Hierarchical and Lightweight Imitation Learning for Power Management of Embedded SoCs},
author = {Anderson L Sartor and Anish Krishnakumar and Samet E Arda and Umit Y Ogras and Radu Marculescu},
url = {https://ieeexplore.ieee.org/document/9085952},
year = {2020},
date = {2020-01-01},
journal = {IEEE Computer Architecture Letters},
volume = {19},
number = {1},
pages = {63--67},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Runtime Task Scheduling using Imitation Learning for Heterogeneous Many-Core Systems Krishnakumar, Anish; Arda, Samet E; Goksoy, Alper A; Mandal, Sumit K; Ogras, Umit Y; Sartor, Anderson L; Marculescu, Radu arXiv preprint arXiv:2007.09361, 2020. Links BibTeX@article{krishnakumar2020runtime,
title = {Runtime Task Scheduling using Imitation Learning for Heterogeneous Many-Core Systems},
author = {Anish Krishnakumar and Samet E Arda and Alper A Goksoy and Sumit K Mandal and Umit Y Ogras and Anderson L Sartor and Radu Marculescu},
url = {https://arxiv.org/abs/2007.09361},
year = {2020},
date = {2020-01-01},
journal = {arXiv preprint arXiv:2007.09361},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Work-in-Progress: A Simulation Framework for Domain-Specific System-on-Chips Arda, Samet E; Anish, NK; Goksoy, Alper A; Mack, Joshua; Kumbhare, Nirmal; Sartor, Anderson L; Akoglu, Ali; Marculescu, Radu; Ogras, Umit Y 2019 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ ISSS), pp. 1–2, IEEE 2019. Links BibTeX@inproceedings{arda2019work,
title = {Work-in-Progress: A Simulation Framework for Domain-Specific System-on-Chips},
author = {Samet E Arda and NK Anish and Alper A Goksoy and Joshua Mack and Nirmal Kumbhare and Anderson L Sartor and Ali Akoglu and Radu Marculescu and Umit Y Ogras},
url = {https://arxiv.org/abs/1908.03664},
year = {2019},
date = {2019-01-01},
booktitle = {2019 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ ISSS)},
pages = {1--2},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Machine Learning-Based Processor Adaptability Targeting Energy, Performance, and Reliability Sartor, Anderson Luiz; Becker, Pedro Henrique Exenberger; Wong, Stephan; Marculescu, Radu; Beck, Antonio Carlos Schneider 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 158–163, IEEE 2019. Links BibTeX@inproceedings{sartor2019machine,
title = {Machine Learning-Based Processor Adaptability Targeting Energy, Performance, and Reliability},
author = {Anderson Luiz Sartor and Pedro Henrique Exenberger Becker and Stephan Wong and Radu Marculescu and Antonio Carlos Schneider Beck},
url = {https://ieeexplore.ieee.org/document/8839457},
year = {2019},
date = {2019-01-01},
booktitle = {2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)},
pages = {158--163},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|