2000
Stochastic sequential machine synthesis with application to constrained sequence generation Journal Article
In: ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 5, no. 3, pp. 658–681, 2000.
Improving simulation efficiency for circuit-level power estimation [CMOS] Proceedings Article
In: 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No. 00CH36353), pp. 471–474, IEEE 2000.
Probabilistic aspects of crosstalk problems in CMOS ICs Proceedings Article
In: Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No. 00CH37044), pp. 117–120, IEEE 2000.
Probabilistic analysis of power dissipation in VLSI systems. Journal Article
In: 2000.
1999
Sequence compaction for power estimation: Theory and practice Journal Article
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 18, no. 7, pp. 973–993, 1999.
Information-theoretic bounds for switching activity analysis in finite-state machines under temporally correlated inputs Proceedings Article
In: Conference Record of the Thirty-Third Asilomar Conference on Signals, Systems, and Computers (Cat. No. CH37020), pp. 369–373, IEEE 1999.
Non-stationary effects in trace-driven power analysis Proceedings Article
In: Proceedings of the 1999 international symposium on Low power electronics and design, pp. 133–138, 1999.
1998
Probabilistic modeling of dependencies during switching activity analysis Journal Article
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 17, no. 2, pp. 73–83, 1998.
Theoretical bounds for switching activity analysis in finite-state machines Proceedings Article
In: Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No. 98TH8379), pp. 36–41, IEEE 1998.
Trace-driven steady-state probability estimation in fsms with application to power estimation Proceedings Article
In: Proceedings Design, Automation and Test in Europe, pp. 774–779, IEEE 1998.
1997
Adaptive models for input data compaction for power simulators Proceedings Article
In: Proceedings of ASP-DAC'97: Asia and South Pacific Design Automation Conference, pp. 391–396, IEEE 1997.
Hierarchical sequence compaction for power estimation Proceedings Article
In: Proceedings of the 34th annual Design Automation Conference, pp. 570–575, 1997.
Sequence compaction for probabilistic analysis of finite-state machines Proceedings Article
In: Proceedings of the 34th annual Design Automation Conference, pp. 12–15, 1997.
Composite sequence compaction for finite-state machines using block entropy and high-order Markov models Proceedings Article
In: Proceedings of 1997 International Symposium on Low Power Electronics and Design, pp. 190–195, IEEE 1997.
Vector compaction using dynamic Markov models Journal Article
In: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences, vol. 80, no. 10, pp. 1924–1933, 1997.
Steady-State Probability Estimation in FSM’s Considering High-Order Temporal Effects,’ Journal Article
In: Technical Report, 1997.
1996
Information theoretic measures for power analysis [logic design] Journal Article
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 15, no. 6, pp. 599–610, 1996.
Improving the efficiency of power simulators by input vector compaction Proceedings Article
In: Proceedings of the 33rd annual Design Automation Conference, pp. 165–168, 1996.
Vector Compaction Using Hierarchical Markov Models Technical Report
Citeseer 1996.
Constrained Sequence Generation Using Stochastic Sequential Machines Journal Article
In: 1996.
1995
Efficient power estimation for highly correlated input streams Proceedings Article
In: Proceedings of the 32nd annual ACM/IEEE Design Automation Conference, pp. 628–634, 1995.
Information theoretic measures of energy consumption at register transfer level Proceedings Article
In: Proceedings of the 1995 international symposium on Low power design, pp. 81–86, 1995.
Switching Activity Estimation Based on Conditional Independence Technical Report
Citeseer 1995.
RT-level power analysis using information theoretic measures Technical Report
USC Technical Report CENG 95-25 1995.
1994
Switching activity analysis considering spatiotemporal correlations Proceedings Article
In: Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, pp. 294–299, 1994.
Logic Level Power Estimation Considering Spatiotemporal Journal Article
In: 1994.
1993
Worst-case analysis for pseudorandom testing Proceedings Article
In: Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium, pp. 187–193, IEEE 1993.
