2012
Technology-driven limits on runtime power management algorithms for multiprocessor systems-on-chip Journal Article
In: ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 8, no. 4, pp. 1–17, 2012.
Dynamic power management for multicores: Case study using the intel SCC Proceedings Article
In: 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), pp. 147–152, IEEE 2012.
A traffic-aware adaptive routing algorithm on a highly reconfigurable network-on-chip architecture Proceedings Article
In: Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, pp. 161–170, 2012.
Exploiting emergence in on-chip interconnects Journal Article
In: IEEE Transactions on Computers, vol. 63, no. 3, pp. 570–582, 2012.
2011
Towards a science of cyber-physical systems design Proceedings Article
In: 2011 IEEE/ACM second international conference on cyber-physical systems, pp. 99–108, IEEE 2011.
FARM: Fault-aware resource management in NoC-based multiprocessor platforms Proceedings Article
In: 2011 Design, Automation & Test in Europe, pp. 1–6, IEEE 2011.
Dynamic power management of voltage-frequency island partitioned networks-on-chip using intel's single-chip cloud computer Proceedings Article
In: Proceedings of the Fifth ACM/IEEE International Symposium, pp. 257–258, IEEE 2011.
Non-stationary traffic analysis and its implications on multicore platform design Journal Article
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 30, no. 4, pp. 508–519, 2011.
Cyberphysical Systems: Workload Modeling and Design Optimization Journal Article
In: IEEE Design and Test of Computers, vol. 28, no. 4, pp. 78, 2011.
A software framework for trace analysis targeting multicore platforms design Proceedings Article
In: Proceedings of the Fifth ACM/IEEE International Symposium, pp. 259–260, IEEE 2011.
Network-on-chip architectures and design methodologies Journal Article
In: Microprocessors & Microsystems, vol. 35, no. 2, pp. 83–84, 2011.
System interconnect design exploration for embedded MPSoCs Proceedings Article
In: International Workshop on System Level Interconnect Prediction, pp. 1–8, IEEE 2011.
Sustainability through massively integrated computing: Are we ready to break the energy efficiency wall for single-chip platforms? Proceedings Article
In: 2011 Design, Automation & Test in Europe, pp. 1–6, IEEE 2011.
Hitting time analysis for fault-tolerant communication at nanoscale in future multiprocessor platforms Journal Article
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 30, no. 8, pp. 1197–1210, 2011.
Special Issue on networks-on-Chips: Design flows and case studies Journal Article
In: Design Automation for Embedded Systems, vol. 15, no. 2, pp. 87–88, 2011.
2010
Workload modeling and related issues for designing future cyber physical systems Journal Article
In: IEEE Design and Test of Computers, vol. 6, 2010.
Quale: A quantum-leap inspired model for non-stationary analysis of noc traffic in chip multi-processors Proceedings Article
In: 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, pp. 241–248, IEEE 2010.
Workload characterization and its impact on multicore platform design Proceedings Article
In: 2010 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ ISSS), pp. 231–240, IEEE 2010.
An analytical approach for network-on-chip performance analysis Journal Article
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 29, no. 12, pp. 2001–2013, 2010.
On-chip networks: Two sides of the same coin Journal Article
In: IEEE Annals of the History of Computing, vol. 27, no. 4, pp. 80–80, 2010.
Find your flow: increasing flow experience by designing" human" embedded systems Proceedings Article
In: Proceedings of the 47th Design Automation Conference, pp. 619–620, 2010.
Designing heterogeneous embedded network-on-chip platforms with users in mind Journal Article
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 29, no. 9, pp. 1301–1314, 2010.
Guest editorial: special section on the ACM/IEEE symposium on networks-on-chip 2009 Journal Article
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 29, no. 6, pp. 853–854, 2010.
Multi-domain Processors: Challenges, Design Methods, and Recent Developments Journal Article
In: 2010.
Custom feedback control: enabling truly scalable on-chip power management for MPSoCs Proceedings Article
In: 2010 ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED), pp. 425–430, IEEE 2010.
Control and Power Management in Presence of Workload Variations Journal Article
In: 2010.
Power management in multicore systems-on-chip Proceedings Article
In: International Conference on Green Computing, pp. 521–521, IEEE 2010.
Unconventional fabrics, architectures, and models for future multi-core systems Proceedings Article
In: Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, pp. 327–328, 2010.
2009
Design and management of voltage-frequency island partitioned networks-on-chip Journal Article
In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 17, no. 3, pp. 330–341, 2009.
Run-time task allocation considering user behavior in embedded multiprocessor networks-on-chip Journal Article
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 29, no. 1, pp. 78–91, 2009.
Statistical physics approaches for network-on-chip traffic characterization Proceedings Article
In: Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis, pp. 461–470, 2009.
Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: A system-level perspective Proceedings Article
In: Proceedings of the 46th Annual Design Automation Conference, pp. 818–821, 2009.
User-centric design space exploration for heterogeneous network-on-chip platforms Proceedings Article
In: 2009 Design, Automation & Test in Europe Conference & Exhibition, pp. 15–20, IEEE 2009.
Toward a science for future NoC design Proceedings Article
In: Proceedings of the 2nd International Workshop on Network on Chip Architectures, pp. 1–1, 2009.
Energy- and Performance-Aware Incremental Mapping for Networks on Chip With Multiple Voltage Levels Journal Article
In: IEEE transactions on computer-aided design of integrated circuits and systems, vol. 27, no. 10, pp. 1866, 2009.
Special Issue-Guest Editors' Introduction: Tackling Key Problems in NoCs Journal Article
In: IEEE design & test of computers, vol. 25, no. 5, pp. 400, 2009.
2008
Outstanding research problems in NoC design: system, microarchitecture, and circuit perspectives Journal Article
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 1, pp. 3–21, 2008.
On-chip communication architecture exploration: A quantitative evaluation of point-to-point, bus, and network-on-chip approaches Journal Article
In: ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 12, no. 3, pp. 1–20, 2008.
Energy-and performance-aware incremental mapping for networks on chip with multiple voltage levels Journal Article
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 10, pp. 1866–1879, 2008.
User-aware dynamic task allocation in networks-on-chip Proceedings Article
In: 2008 Design, Automation and Test in Europe, pp. 1232–1237, Ieee 2008.
Contention-aware application mapping for network-on-chip communication architectures Proceedings Article
In: 2008 IEEE international conference on computer design, pp. 164–169, IEEE 2008.
Variation-adaptive feedback control for networks-on-chip with multiple clock domains Proceedings Article
In: 2008 45th ACM/IEEE Design Automation Conference, pp. 614–619, IEEE 2008.
Analysis and optimization of prediction-based flow control in networks-on-chip Journal Article
In: ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 13, no. 1, pp. 1–28, 2008.
The search for alternative computational paradigms Journal Article
In: IEEE Design & Test of Computers, vol. 25, no. 4, pp. 334–343, 2008.
Communication-aware face detection using noc architecture Proceedings Article
In: International Conference on Computer Vision Systems, pp. 181–189, Springer, Berlin, Heidelberg 2008.
Hitting time analysis for stochastic communication Proceedings Article
In: International Conference on Nano-Networks, pp. 39–43, Springer, Berlin, Heidelberg 2008.
Predictive energy-efficient multicast for large-scale mobile ad hoc networks Proceedings Article
In: 2008 5th IEEE Consumer Communications and Networking Conference, pp. 709–713, IEEE 2008.
Enabling multimedia using resource-constrained video processing techniques: A node-centric perspective Journal Article
In: ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 13, no. 1, pp. 1–27, 2008.
The Chip Is the Network Miscellaneous
2008.