Embedded Systems

Embedded systems are computer systems that perform dedicated functions while being parts of a larger system. Our research targets primarily heterogeneous many-core System on a Chip (SoC) platforms where communication happens via the network-on-chip. These SoCs should be designed to meet aggressive performance requirements, while coping with limited battery capacity, thermal design power, and real-time constraints. Over the years, we have considered deterministic, probabilistic, and statistical physics-inspired design paradigms. Lately, our research targets machine learning approaches (e.g., imitation and reinforcement learning) for performance and energy optimization and resource management in heterogeneous SoC platforms.

Embedded Systems

Selected Publications

148 entries « 4 of 25 »

Qian, Zhiliang; Bogdan, Paul; Tsui, Chi-Ying; Marculescu, Radu

Performance evaluation of noc-based multicore systems: From traffic analysis to noc latency modeling Journal Article

In: ACM Transactions on Design Automation of Electronic Systems (TODAES), 21 (3), pp. 1–38, 2016.

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Kim, Ryan Gary; Choi, Wonje; Chen, Zhuo; Pande, Partha Pratim; Marculescu, Diana; Marculescu, Radu

Wireless NoC and dynamic VFI codesign: Energy efficiency without performance penalty Journal Article

In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 24 (7), pp. 2488–2501, 2016.

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Duraisamy, Karthi; Kim, Ryan Gary; Choi, Wonje; Liu, Guangshuo; Pande, Partha Pratim; Marculescu, Radu; Marculescu, Diana

Energy efficient MapReduce with VFI-enabled multicore platforms Inproceedings

In: 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC), pp. 1–6, IEEE 2015.

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Kim, Ryan Gary; Choi, Wonje; Liu, Guangshuo; Mohandesi, Ehsan; Pande, Partha Pratim; Marculescu, Diana; Marculescu, Radu

Wireless NoC for VFI-enabled multicore chip design: Performance evaluation and design trade-offs Journal Article

In: IEEE Transactions on Computers, 65 (4), pp. 1323–1336, 2015.

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Qian, Zhi-Liang; Juan, Da-Cheng; Bogdan, Paul; Tsui, Chi-Ying; Marculescu, Diana; Marculescu, Radu

A support vector regression (SVR)-based latency model for network-on-chip (NoC) architectures Journal Article

In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 35 (3), pp. 471–484, 2015.

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Blanton, Ronald D; Li, Xin; Mai, Ken; Marculescu, Diana; Marculescu, Radu; Paramesh, Jeyanandh; Schneider, Jeff; Thomas, Donald E

Statistical learning in chip (slic) Inproceedings

In: 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 664–669, IEEE 2015.

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148 entries « 4 of 25 »